Timer and PWM register calculator

You need a PWM frequency and want the prescaler and period pair that keeps the most duty-cycle resolution. Ranked prescaler and auto-reload pairs for a target frequency, with the PWM resolution each pair leaves you.

Open the calculator in EM·LINKBelow is a worked example. The working calculator runs free in EM·LINK.

Worked example

Example inputs

84MHz
20kHz
16 bit▾
25%

Example result

Best pairPSC 0, ARR 4199

Exactly 20.000 kHz with 12.04 bits of duty resolution. CCR = 1050 for 25 %.

PSCARRResolutionDuty step
0419912.04 bits0.024 %
1209911.04 bits0.048 %
2139910.45 bits0.071 %
3104910.04 bits0.095 %

All four pairs hit 20 kHz exactly. Only the resolution differs.

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Run it with your own values

The working calculator is Timer & PWM Register Calculator in EM·LINK, our free browser tool. The button opens it directly.

Open in EM·LINK

How to read the result

Prefer the pair with the largest ARR. At ARR 4199 (4200 steps, about 12 bits) duty steps are 0.024 percent; at ARR 41 (42 steps) they are 2.4 percent.

How this is calculated

The timer counts PSC + 1 clocks per tick and ARR + 1 ticks per period. Pairs that give the target frequency are ranked by how many duty steps they leave.

f_out = f_timer / ((PSC + 1) × (ARR + 1)) resolution = log2(ARR + 1) bits CCR = (ARR + 1) × duty

The full derivation, step by step, is in the EM·LINK documentation.

Calculated per common engineering practice (general MCU timer arithmetic). These tools are an engineering aid, not a certification.

Next step

Shipping hundreds of units? Get OTA updates and remote config without building it yourself.

Common questions

How do I choose prescaler and ARR?

Pick the smallest prescaler that keeps ARR within the timer width. That maximises resolution.

How many bits of PWM resolution do I get?

log2(ARR + 1).

Is this STM32 specific?

No, it fits any PSC plus ARR style timer.